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주최：JIEP-Japan Institute of Electronics Packaging
운영：JPCA-Japan Electronics Packaging and Circuit Association
회기：6월 11일 (수)-6월 13일 (금)
회장:TOKYO BIG SIGHT, 1F 101·102 회의실

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Latest Technology and problem for Bare Chip and KGD
Masayuki Saitoh
■ KGD Test for Sip/MCP
Assistant to General Manager, 2'nd SOC Test System Division,ADVANTEST Corporation
Yoshio Komoto
■ The Status & Trend of Semiconductor Burn-in Test Technology
President,Aehr Test Systems Japan Limited , Kenny (Kunio) Sano
■ Die Pproducts (Bare Chip IC) Handling & Quality Control
Managing Director,Grand Joint Technology Ltd.President/
Technical Adviser Electronic Device Operations,
Tetsuya Onishi
 
 
"JISSO Revolution" -Latest Trend of Embedded Component Technology-
Koji Ikawa
■ Embedded Passive and Active Devices Technology (e-B2itTM) Development and Actual Mass Production Example
President/ Technical Adviser Electronic Device Operations,Weisti (Worldeide Electronic Integrated Substrate Technology Inc.)/Dai Nippon Printing Co., Ltd.
Yoshitaka FUKUOKA
■ The Current Trend of Embedded Component Technology for PWB
Team Manager Technology Planning Team Products Development Unit, IBIDEN Co,.LTD.
Masanao Yano
■ Mounting Technology for Components Embedding
Staff Engineer,Process Solution Development Group,Panasonic Factory Solutions Co., Ltd.
Takeshi MORITA
 
 
Next Development for Metal Nanoparticle Application Technology
Shigeru Kohinata
■ Preparation of Metal Nano-particles and Their Application to Circuit Pattern Formation by Ink Jet Printing
MARKETING PRODUCT DEVELOPMENT FINE PRODUCTS,NIPPON PAINT CO.,LTD.
Hideo Ishibashi
■ Metal Nanoparticle Properties, Characteristics of Individual Nanopaticle Paste and the Development from Now Onward
GENERAL MANAGER,ELECTRONIC MATERIALS DIVISION , YOSHIDA YUKIO
■ Non-remelting Interconnective Material “A-FAPTM Paste”
Manager, Electronics Materials Development Dept., R&D Center,
ASAHI KASEI EMD CORPORATION
Jun-ichi Nishijima
 
 
Front Technology of Optical Interconnection
Kazuhiko Kurata
■ Optical Interconnection for Next-generation Supercomputer
ExecutiveExpert,Computers Division , Tatsuo Satoh

Shogo Ura		 ■ Wavelength Division Multiplexing Optical Interconnects Board
Professor, Department of Electronics,Kyoto Institute of Technology/Photonics Research Institute,National Institute of Advanced Industrial Science and Technology
Shogo Ura/Kenji Kintaka
■ Opto-electronic Backplane Model Developed in AIST Opto-electronic System Integration Collaborative Research Team
Opto-Electronic System Integration Collaborative Research Team,Nanoelectronics Research Institute,National Institute of Advanced Industrial Science and Technology(AIST)
Takashi Mikawa
 
 
Come into Practical Use 3D Chip Integration Technology
Hiroyuki Tenmei
■ Full Field Lithography for 3D Topography and High Performace Bonding for Advanced MEMS Packaging
Lithography Division/Business Manager,SUSS MicroTec KK , Raymond Lau
■ 3D Chip Integration Technology
IBM Research, Tokyo Research Laboratory / Senior researcher , Fumiaki Yamada
■ Wafer-level Three-Dimensional Integration Technology Using Self-Assembly
Bioengineering and Robotics, Assistant Professor, Tohoku University , Fukushima Takafumi
 
 
Trend of the Substrate Material Technologies for Thin and Minitualized Package
Akishi Nakaso
■ Electronic Packaging Material System for Thin Semiconductor Package
Electronic Materials R&D Center Laboratory for Electronic Packaging Materials & Technology, Hitachi Chemical Co., Ltd.
Toshiaki Tanaka
■ The Trend of the Substrate Materials for a Thin Package
Electronic & Plastic Materials Business Unit Electronic Materials Division,Product Development Group Manager, Matsushita Electric Works,Ltd.
Hidetsugu Motobe
■ Heat Resistant Low CTE Polyimide Film " XENOMAX®"
Manager, New Business Planning Office,Business Development Planning Office , Satoshi Maeda
 
 
This is the Key Point for High Efficiency and Minitualization -Materials with High Thermal Conductivity and EvaluationTechnology Trend
Satoshi Yanaura
■ A Measurement Technique and an Application of Thermal Microscope
Hudson lab., Bethel corporation , Kimihito Hatori
■ Epoxy Resins with Controlled Higher Order Structures
Senior Researcher, Unit Leader,Department of Electronic Materials and Devices Research,Hitachi Research Laboratory, Hitachi, Ltd
Yoshitaka Takezawa
■ New Ddeveloped Radiation Material with High Thermal Conductivity/
Low Thermal Expansion
Chief researcher,Project for high performance functional materials,
Shimane institute for industrial technology
UENO Toshiyuki
 
 
Latest Trend and JISSO Technology for Automobile Electronics which Japan leads.
Motoyo Wajima
■ Technology Trend of Automobile Electronics and Jisso Technology Target
Electronics Systems Business Group Electronic Packaging Planning Center,
DENSO CORPORATION
Arihiro Kamiya
■ Recent Semiconductor Packaging Technologies for Automotive
Department Manager, Package Engineering Dept., Renesas Technology Corp. , Ryo Haruta
■ Sensor makes vehicles more comfortable and convenient
Device Business Unit, Sensor Products Department, Department Manager,
Murata Manufacturing Co.,Ltd.
Yoshitsugu Atsuta
 
 
Mass Production, new development and Positive Progress of MEMS Technologies
Renshi Sawada
■ Future of Automotive Systems and Semiconductor Sensor Package Trend
General Manager ,IC Engineering Department 2,DENSO CORPORATION , Yasuki Shimoyama
■ Fusion of CMOS and Bioscience for Smart Biosensors and Package Technology
Professor,Department of Electrical and Electronic Engineering,
Toyohashi University of Technology
Kazuaki Sawada
■ Low-temperature Bonding Technique and Application for Optical Micro-systems
Associate Professor,Research Center for Advanced Science and Technology,
The University of Tokyo
Eiji Higurashi
 
 
Next Theme and Evaluation Technology for Reliability Reservation for Mobile Equipments
Haruo Tabata
■ Ionic Migration in the Field of Electronics Packaging
Assoc. Prof.,Department of Energy & Environmental Science,Graduate School of Engineering, Utsunomiya University
Sachio Yoshihara
■ Change of Micro Structure and Reliability of BGA Solder Ball Joint by Heat Cycle
Morphological Research Labs. 2nd Lab.,Toray Research Center, Inc.
Mototaka Ito
■ Assessment Test for Solder Joint Reliability
TI Fellow,Tsukuba Technology Center, Texas Instruments, Japan , Masazumi Amagai
 
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「최첨단 실장 기술 심포지엄」의 신청은, 이쪽 내장자 사전 등록