主办:电子贴装协会 营运:日本电子电路工业会
会期:5月30日(星期三)~6月1日(星期五)
Place:TOKYO BIG SIGHT,1F 101·102会议室
 
「最尖端实现技术讨论会」的申请,这边从 到场者事前登记
   
 
※请在定员里(上)一变成就让我届满申请。请提前申请。
※有如果根据情况讲师·程序的内容成为变更。

5月30日(星期三)

Room A 101

30A1
3D Packaging Innovation 1 (Chip Level Stack Technology)
10:00-13:00
Chariman:Haruo Tabata
 
 3D Packaging Technology for Chip Stacked DRAM
Toshiro Mitsuhashi,Manager,SIP Engineering Department,ATP Manufacturing Division,
Oki Electric Industry Co., Ltd.
 
 
 
 
 
 

The Advanced Approach for SiP Technologies
Michitaka Kimura,Jisso Technology Development Dept.,Renesas Technology Corp.
 
 
 
 
 
 

Thinning and Dicing Technologies for SiP

 

Akihito Kawai,Marketing Team Leader,PS Company Sales Engineering Department,
DISCO CORPORATION
 
 
 
 


30A2
3D Packaging Innovation 2 (Packaging Level Stack Technology)
14:00-17:00
Chariman:Hiroyuki Tenmei
 
Reliable PoP Jisso Realized by Machine and Process Evolution
Takeshi Morita,Electronic Component Mounting Systems & Solution Business Unit,
Panasonic Factory Solutions Co., Ltd.
 
 
 
 
 

Current Status & Future Technology for POP Assembly & Jisso
Jun Taniguchi,Manager,3D CSP Product,Amkor Technology Japan KK.
 
 
 
 
 
 

3D Packaging - PoP Current Status and Future
Takafumi Ando,Hiji Package Engineering,Texas Instruments Japan
 
 
 
 
 
 


Room B 102

30B1
The Most Advanced Estimation
and CAE Technologies for High-speed Circuit Design
10:00-13:00
Chariman丗Mitsubishi Electric Corp. Masahiro Fukino
 
On-Chip Noise Measurements and Evaluation in SoCs
Makoto Nagata,Assistant Professor,Department of Computer and Systems Engineering,
Kobe University
 
 
 
 
 

High Speed Signal Propagation Design for Gigabit Transmission
Ichiro Kambayashi,Application Engineering Division,Tektronix Japan Ltd.
 
 
 
 
 
 

SI/PI Solution for High-Speed Printed Circuit Board
Masaki Tosaka,Corporate Technology Unit,Corporate Circuit Technology Center,
FUJITSU LIMITED
 
 
 
 


30B2
JAPAN Jisso (Packaging Technology) Innovation (English Session)
14:00-17:00
Chariman:Hiroshi Haji, Seiichi Denda
 
Advanced PWB Technology Roadmap
Mr. Henry H. Utsunomiya,President,Interconnection Technologies, Inc.
 
 
 
 
 
 
 

Thin Wafer and Through Silicon Via Technologies
- New Silicon Processes for Electronic Packaging

Dr. Sei-ichi Denda,Visiting Professor,Nagano Prefectural Institute of Technology,
 
 
 
 
 
 
 

System Integration Platform Organization Standards (SIPOS)
- Activity for System-in-a-Package

Prof. Hajime Tomokage,Professor Dept. of Electronics Engr. & Computer Sci.,
Fukuoka University
 
 
 
 
 



5月31日(星期四)

Room A 101

31A1
Novel FPC technologies for Innovating Digital Mobile Equipments
10:00-13:00
Chairman:Motoyo Wajima
 
Development of Brand-new Concept Multi Layer FPC by Using New Build Up Technology
Garo Miyamoto,Research & Development,NIPPON MEKTRON, LTD.
 
 
 
 
 
 
 

Technical Trend of FPC Materials for Flex-rigid
Hiroaki Takahashi,Flexible Circuit Material Business Group,
Electronic & Plastic Materials Company,Matsushita Electric Works, Ltd.
 
 
 
 
 

Multi-Layer FPC "Sbic" by Simultaneous Laminating Method and the Applied Technology
Masayoshi Kondo,Flexible Circuit Research & Development Dept.,
Akita Sumitomo Bakelite Co., Ltd.
 
 
 
 
 


31A2
Come into Practical Use PCBs with Embedded Components!
- The Latest Status of Their Technology
14:00-17:00
Chairman:Koji Ikawa
 
Development of Embedded Components Module Technology
Masashi Miyazaki,Manager,EOMIN Project,Module Product Division,TAIYO YUDEN Co., LTD.
 
 
 
 
 
 

3D Embedded Components Module Technology -SIMPACT-
Yukihiro Ishimaru,Staff Engineer,Jisso Core Engineering Laboratory
,Corporate Manufacturing Innovation Division,Matsushita Electric Industrial Co., Ltd.
 
 
 
 

Application to Module Technology of Build-up PWB Embedded Passive and Active Devices
Keisuke Okada,Executive Officer,Engineering and Development Department,
NEC TOPPAN CIRCUIT SOLUTIONS, INC.
 
 
 



Room B 102

31B1
MEMS Packaging,
One of the Most Important Factors in Developing MEMS Products
10:00-13:00
Chairman;Renshi Sawada
 
Silicon Tthrough Interconnection for MEMS Packaging
Satoru Kuramochi,General Manager,Research and Development Center,
Dai Nippon Printing Co, Ltd.
 
 
 

The Development of MEMS-VOA
Keiji Isamoto,Manager,Optical Component Design Group,Santec Corporation
 
 
 
 
 
 

Innovative Process Technology for MEMS Wafer-level Packaging
Takashi Saijo,EMIT Device Development Department,Process Development Group,
Matsushita Electric Works, Ltd.
 
 
 


31B2
Technology Challenge in Optical Interconnecion
14:00-17:00
Chairman:Kazuhiko Kurata
 
CIST and Photonic Functional Device Manufacturing Project


Soichi Kobayashi,Professor,Department of Photonic Science,
Chitose Institute of Science and Technology
 
 
 
 

Recent Oversea R & D Progress in Optoelectronic Packaging Technology
Takashi Mikawa,Opto-Electronic System Integration Collaborative Research Team,Nanoelectronics Research Institute,National Institute of Advanced Industrial Science
and Technology (AIST)
 
 
 
 
 

Optical Interconnect Technologies for Computing Systems
Shigeru Nakagawa,Advisory Researcher,IBM Japan Tokyo Research Laboratory
 
 
 
 
 
 



6月1日(星期五)

Room A 101

01A1
High Efficiency Heat Transfer Technology that Holds the Key of Electronic Device Performance
10:00-13:00
Chairman:Satoshi Yanaura
 
Thermal Management of Fujitsu High-End Unix Servers
Jie Wei,Corporate Technology Center,Corporate Product Technology Unit,FUJITSU LIMITED
 
 
 
 
 
 
 

Technical Trend of High Thermal-conductive Insulated Metal Substrate
Naomi Yonemura,Technical Sales Manager,Electronic Materials Business Division,
Denki Kagaku Kogyo Kabusikikaisha
 
 
 
 
 

Micro-channel Heat Sink
Tetsuro Ogushi,Principal Researcher,Mechanical Technology Dept.,Advanced Technology
R&D Center,Mitsubishi Electric Corporation
 
 
 
 
 
 



Room B 102

01B1
Printable Electronics in Advanced Stage
10:00-13:00
Chairman:Shigeru Kohinata
 
Printable Electronics by Inkjet Technology for Nano Metal Dispersed Ink
Shinichi Nishi,R&D General Manager,Konicaminolta IJ Technologies, Inc
 
 
 
 
 
 
 

Challenge to Prepare Fine Electronic Circuit Pattern by the Use of Copper Nanoparticle Paste
Masami Nakamoto,Manager,Organic Materials Department,
Osaka Municipal Technical Research Institute
 
 
 
 
 
 

Inkjet Technology for Jisso Applications
Kenji Wada,General Manager,IJ Industrial Applications R&D Dept.,Seiko Epson Co.
 
 
 
 
 
 
 

 
「最尖端实现技术讨论会」的申请,这边从 到场者事前登记